Internet–of–Things (IoT) envisions a large scale deployment of ultra-low-power (ULP) electronic devices integrated into our environment to perform meaningful sensing and communication. However, existing IoT devices have lower available power and can perform only a limited amount of sensing, processing, and communication, of which communication has the highest power consumption. To reduce the power consumption needed for communication, the amount of data must be reduced which can be done by incorporating computing at the edge in IoT. 
Analog computing and processing can achieve both lower power and lower area. Gain structures such as differential amplifiers, op-amps, filters, etc. are the fundamental building blocks of an analog computer. However, these circuit elements suffer from inaccuracies and drift due to process, voltage, and temperature (PVT) variations.
Technology Overview
This invention presents the design of an ultra-low power subthreshold Gm stage where transconductance is very stable with respect to process, temperature, and voltage variations. This technique is used to design a differential amplifier with a constant gain and a second-order bi‑quad filter with constant cut off frequency. The amplifier gain achieves a small temperature coefficient of 48.6 ppm/◦C and exhibits a small sigma of 75 mdB with the process. The second-order bi‑quad achieves temperature stability of 69 ppm/◦C and a voltage coefficient of only 49 ppm/mV.
- Significantly improves conventional architectures where variation in environmental and operating condition causes filters and amplifier operating conditions to change
- Changes the way analog circuits are used in an integrated circuit. It Will help in cutting down the testing cost, reduce area, and enable ultra-low-power analog computing
- Developing machine-learning, deep-learning, analog computing hardware
- Helps to develop on-chip analog multiplier, convolutional blocks needed for the machine learning algorithm
- Computer vision, speech recognition and processing, and feature extraction in the application of eventual ASIC (application-specific integrated circuits)
- License
- Research collaboration
- Partnering
Patent Information:
For Information, Contact:
Mark Saulich
Associate Director of Commercialization
Northeastern University
Aatmesh Shrivastava